This invention relates to a delta-sigma modulator circuit used in an analog-to-digital converter that modulates analog signals such as voice-band signals for the purpose of converting these signals to digital signals in digital communication equipment. The modulated signal of a simple digital form are subsequently passed through a digital low-pass filter to be converted into PCM signals.
A prior art delta-sigma modulator and an A/D converter incorporating it are described in Technical Report CS83-198, 83[307] of the Institute of Electronics and Communications Engineers of Japan (1984-3-23), pp. 93-100. The circuit is explained below with reference to the drawings.
FIG. 1 is a block diagram showing a general construction of an analog-to-digital (A/D) converter. This A/D converter comprises an analog filter 1 for receiving the analog input signal IS, an oversampling sampler 2, a delta-sigma modulator 3, a digital low-pass filter 4, and a decimator sampler 5 for generating the digital output signal OS.
The analog input signal IS of the A/D converter is fed through the analog filter 1 to the sampler 2, which samples it at a rate higher than the Nyquist rate and sends the sampled signal to the delta-sigma modulator 3. The delta-sigma modulator 3 modulates the sampled signal and outputs the result (modulation) of in a digital form. This digital signal is fed through the digital low-pass filter 4 and sampler 5 to produce the digital output signal OS of the A/D converter.
As shown in the reference cited above, the integrating filter of the delta-sigma modulator 3 can be of the single or double integrating type. The double integrating type is necessary to provide 14-bit equivalent quantizing accuracy in the voice band for digital communications.
FIG. 2 is a diagram of the equivalent circuit of the double integrating delta-sigma modulator used in the prior art.
This circuit comprises a first adder 30 that obtains the difference between the analog input signal IS1 from the sampler 2 and the feedback signal FS, a first integrator 31 that integrates the output of the first adder 30 to produce the first integral signal, a second adder 32 that obtains the difference between the first integral signal and the feedback signal FS, a second integrator 33 that integrates the output of the second adder 32 to produce the second integral signal, and a quantizer 34 that quantizes the second integral signal to produce the digital output signal OS1. Connected in a feedback loop between the input and output ends is a delay element 35 that generates the feedback signal FS from the output signal OS1.
The transfer characteristic of the double integrating delta-sigma modulator in FIG. 2 can be expressed in terms of the Z transform. Let X(Z) be the input signal IS1, Y(Z) be the output signal OS1 and Q(Z) be the quantizing noise generated by the quantizer 34. Then: EQU Y(Z)=X(Z)+(1-Z.sup.-1).sup.2 .multidot.Q(Z) (1)
where Z.sup.-1 signifies a unit delay element. Eq. 1 indicates that the output signal Y(Z) has a flat in-band characteristic, its signal component being equal to the input signal X(Z). The out-of-band noise component of the output signal Y(Z) increases rapidly with the frequency, but if the noise is removed by a digital low-pass filter 4 provided at a succeeding stage as in FIG. 1, the final digital output signal OS is the quantized version of the analog input signal IS.
If the signal level range of the input signal IS1 is ISI.ltoreq.1, then the overload levels of the input signal IS1 and the feedback signal FS from the quantizer 34 are both .+-.1. Accordingly, when the maximum voltage amplitude of the input signal IS1 is 1 V, the signal voltage of the feedback signal FS obtained by delaying the output signal OS1 is 1 V.
Suppose the quantizer 34 is a 1-bit quantizer that determines the polarity of its input, which is the second integral signal, and selects the voltage of its output signal OS1 accordingly: +1 V for a positive input and -1 V for a negative input. The double integrating delta-sigma modulator then integrates the difference between the input signal IS1 and the feedback signal FS by means of the first integrator 31, integrates the difference between this first integral signal and the feedback signal FS by means of the second integrator 33, determines the polarity of the resulting second integral signal by means of the quantizer 34, and produces a two-level quantized output signal OS1.
The double integrating delta-sigma modulator described above requires that the integral signal voltage of the first integrator 31 be 1 to 2 times as large as the input signal IS1, and that the integral signal voltage of the second integrator 33, be about 2 to 4 times as large. For this reason it is necessary to attenuate the input signal IS1 by a proportional amount, but this makes the circuit vulnerable to internal noise and degrades its overall signal-to-noise (S/N) characteristic.